So what impedance is being calculated by this tool?
Well, the simple formula is here:
So basically the parallel of all the capacitors, plus the power supply (drive) plus the plane capacitor. All calculated with the proper complex math and all.
What is not part of the equations is the resonances of the plane, which will have a significant effect at higher frequencies.
Thank you for this great tool, I really like it.
I do, however, wonder why the ESL of the plane has not been taken into account in the impedance calculation? Isn’t it true that at high frequencies inductance is the key parameter that one should pay attention to while designing a PDN?
Modern ultra-thin laminates (8µm) based on the Buried Capacitance technology yield a very high capacitance per square cm, but more important and interesting is the significant reduction of the plane inductance due to the mutual inductance. It would be very nice to see how this affects the overall impedance profile.
I know that as opposed to the static capacitance of a laminate, which stays the same everywhere on the plane, inductance changes with location. It is the lowest in the middle of the plane and goes up rather sharply towards the sides and edges. Taking that into account in the formula above would be a real pain. Might that be the reason?
I look forward to your reply.
Jeroen van der Velden
You can look at the problem many different ways. And this simple lumped element model is very simple. That is the beauty of it. And it is sufficient for most cases (in my experience, which includes 24L boards with +100A FPGA core supply etc.).
If you really want to get advanced, you can do 3D simulations of the same problem. You will however find that the accuracy of the data input (especially for currents) is quite limited, so the accuracy of the output is not going to be much better – no matter how advanced your simulation gets.